Reservoir Computing with Charge-Trap Memory Based on a MoS2 Channel for Neuromorphic Engineering

Novel memory devices are essential for developing low power, fast, and accurate in-memory computing and neuromorphic engineering concepts that can compete with the conventional complementary metal-oxide-semiconductor (CMOS) digital processors. 2D semiconductors provide a novel platform for advanced semiconductors with atomic thickness, low-current operation, and capability of 3D integration. This work presents a charge-trap memory (CTM) device with a MoS2 channel where memory operation arises, thanks to electron trapping/detrapping at interface states. Transistor operation, memory characteristics, and synaptic potentiation/depression for neuromorphic applications are demonstrated. The CTM device shows outstanding linearity of the potentiation by applied drain pulses of equal amplitude. Finally, pattern recognition is demonstrated by reservoir computing where the input pattern is applied as a stimulation of the MoS2-based CTMs, while the output current after stimulation is processed by a feedforward readout network. The good accuracy, the low current operation, and the robustness to input random bit flip makes the CTM device a promising technology for future high-density neuromorphic computing concepts

Physical Modeling for Programming of TANOS Memories in the Fowler-Nordheim Regime

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Transient currents in HfO2 and their impact on circuit and memory applications

We investigate transient currents in HfO2 dielectrics, considering their dependence on electric field, temperature and gate stack composition. We show that transient currents remain an issue even at very low temperatures and irrespective of the HfO2/SiO2 bilayer properties. Finally, we assess their impact on the reliability of precision circuit and memory applications Transient currents in HfO2 and their impact on circuit and memory applications (PDF Download Available). Available from: http://www.researchgate.net/publication/224672970_Transient_currents_in_HfO2_and_their_impact_on_circuit_and_memory_applications [accessed Oct 22, 2015]

Three-Dimensional Simulation of Charge-Trap Memory Programming-Part I: Average Behavior

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Semi-Analytical Model for the Transient Operation of Gate-All-Around Charge-Trap Memories

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Comprehensive Investigation of Statistical Effects in Nitride Memories-Part I: Physics-Based Modeling

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High-Density Solid-State Memory Devices and Technologies

The relevance of solid-state memories in the world of electronics is on the constant rise [...

A comparison of modeling approaches for current transport in polysilicon‑channel nanowire and macaroni GAA MOSFETs

AbstractIn this paper, we compare quantitatively the results obtained from the numerical simulation of current transport in polysilicon-channel MOSFETs under different modeling assumptions typically adopted to reproduce the basic physics of the devices, including the effective medium approximation and the description of polysilicon as the haphazard ensemble of monocrystalline silicon grains separated by highly defective grain boundaries. In the latter case, both pure drift-diffusion transport and a mix of intra-grain drift-diffusion and inter-grain thermionic emission are considered. Interest is focused on cylindrical nanowire and macaroni gate-all-around structures, due to their relevance in the field of 3-Dimensional NAND Flash memories, focusing not only on the average behavior but also on the variability in the electrical characteristics of the devices